1. Field of the Invention
The present invention relates to a semiconductor device including a memory element and a driving method of the semiconductor device.
2. Description of the Related Art
With miniaturization of a wiring by development of LSI (Large Scale Integration) manufacturing techniques, a problem of a leak current has become significant. The leak current causes problems such as heat of the LSIs or increase of power consumption. In particular, a problem of power consumption directly affects a continuous operating time of portable devices such as mobile phones and notebook personal computers, which becomes a serious problem. Therefore, various kinds of techniques are suggested for lowering power consumption of the LSIs.
For example, as the operation of LSIs, there are cases where the maximum performance is required or not. When the operating speed of the LSIs is not required to be very high, there is a technique in which a frequency of a clock is reduced to operate the LSIs. Similarly, when the maximum operating speed is not required, there is a technique in which a substrate bias is shifted and the threshold is controlled, so that a leak current is reduced.
In addition, a very high-capacity memory such as a cache is provided inside recent LSIs, and the LSIs are often composed of an SRAM (Static Random Access Memory). The SRAM stores a value by connecting inverter circuits to each other. An electric state is not changed once a value is stored; however, a leak current flows out of a power supply line which is electrically connected to the inverter circuit into a ground line.
As a configuration of an SRAM of which power consumption is reduced, a switching MOS transistor is provided between a power supply line of a memory cell group which is selected by each word line of a row decoder of the SRAM and a power supply line of a voltage supply source side, and the switching MOS transistor is opened or closed by a selection signal from the word line (Reference 1: Japanese Patent Laid-Open No. Hei 10-106267).